Wafer-level testing and test during burn-in for integrated circuits

Bahukudumbi, Sudarshan.

Wafer-level testing and test during burn-in for integrated circuits [electronic resource] / Sudarshan Bahukudumbi, Krishnendu Chakrabarty. - Boston : Artech House, 2010. - xv, 198 p. : ill. - Artech House integrated microsystems series . - Artech House integrated microsystems series. .

Includes bibliographical references and index.


Electronic reproduction.
Palo Alto, Calif. :
ebrary,
2011.
Available via World Wide Web.
Access may be limited to ebrary affiliated libraries.




Integrated circuits--Testing.
Integrated circuits--Wafer-scale integration.
Semiconductors--Testing.


Electronic books.

TK7874 / .B35 2010eb

621.38132