FSM-based digital design using Verilog HDL [electronic resource] / Peter Minns, Ian Elliott.
Material type:
- Finite state machine based digital design using Verilog HDL
- 004/.33 22
- TK7885.7 .M54 2008eb
No physical items for this record
Includes bibliographical references and index.
Electronic reproduction. Palo Alto, Calif. : ebrary, 2013. Available via World Wide Web. Access may be limited to ebrary affiliated libraries.
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