Bellido, Manuel J.,  1964- <br/><br/>
Logic-timing simulation and the degradation delay model  [electronic resource] / 
Manuel J. Bellido, Jorge Juan, Manuel Valencia. 
 - London :  Imperial College Press,  c2006. 
 - xvii, 267 p. :  ill. 
<br/><br/>Includes bibliographical references and index. 
<br/><br/><br/>Electronic reproduction. <br/>Palo Alto, Calif. : <br/>ebrary, <br/>2009. <br/>Available via World Wide Web. <br/>Access may be limited to ebrary affiliated libraries. 
<br/><br/><label>ISBN: </label>
<br/><br/><label>Subjects--Topical Terms: </label><br/>Computer simulation.<br/>Mathematical models.
<br/><br/><label>Index Terms--Genre/Form: </label><br/>Electronic books.
<br/><br/><label>LC Class. No.: </label>TK7868.T5  / B45 2006eb