| 000 | 01450nam a2200361Ia 4500 | ||
|---|---|---|---|
| 001 | 0000111193 | ||
| 005 | 20171002055844.0 | ||
| 006 | m u | ||
| 007 | cr cn||||||||| | ||
| 008 | 090117s2009 maua sb 001 0 eng d | ||
| 020 | _z1596933836 (cased) | ||
| 020 | _z9781596933835 (cased) | ||
| 035 | _a(CaPaEBR)ebr10312962 | ||
| 035 | _a(OCoLC)503447788 | ||
| 040 |
_aCaPaEBR _cCaPaEBR |
||
| 050 | 1 | 4 |
_aTK7872.P38 _bQ44 2009eb |
| 100 | 1 | _aQuemada, Carlos. | |
| 245 | 1 | 0 |
_aDesign methodology for RF CMOS phase lock loops _h[electronic resource] / _cCarlos Quemada, Guillermo Bistué, Iñigo Adin. |
| 260 |
_aBoston ; _aLondon : _bArtech House, _cc2009. |
||
| 300 |
_axii, 226 p. : _bill. |
||
| 490 | 1 | _aArtech House microwave library | |
| 504 | _aIncludes bibliographical references and index. | ||
| 533 |
_aElectronic reproduction. _bPalo Alto, Calif. : _cebrary, _d2011. _nAvailable via World Wide Web. _nAccess may be limited to ebrary affiliated libraries. |
||
| 650 | 0 |
_aMetal oxide semiconductors, Complementary _xDesign and construction. |
|
| 650 | 0 |
_aPhase-locked loops _xDesign and construction. |
|
| 655 | 7 |
_aElectronic books. _2local |
|
| 700 | 1 | _aAdin, IIñigoigo. | |
| 700 | 1 | _aBistué, Guillermo. | |
| 710 | 2 | _aebrary, Inc. | |
| 830 | 0 | _aArtech House microwave library. | |
| 856 | 4 | 0 |
_uhttp://site.ebrary.com/lib/daystar/Doc?id=10312962 _zAn electronic book accessible through the World Wide Web; click to view |
| 908 | _a170314 | ||
| 942 | 0 | 0 | _cEB |
| 999 |
_c100343 _d100343 |
||