000 | 01648nam a2200397 i 4500 | ||
---|---|---|---|
001 | 0000186558 | ||
005 | 20171002065155.0 | ||
006 | m o d | ||
007 | cr cn||||||||| | ||
008 | 140827t20142014si a ob 001 0 eng d | ||
020 | _z9781118659182 | ||
020 | _a9781118659212 (e-book) | ||
035 | _a(CaPaEBR)ebr10908323 | ||
035 | _a(OCoLC)880960165 | ||
040 |
_aCaPaEBR _beng _erda _epn _cCaPaEBR |
||
050 | 1 | 4 |
_aTK7885.7 _b.J46 2014eb |
082 | 0 | 4 |
_a621.39 _223 |
100 | 1 |
_aJeong, Hong, _eauthor. |
|
245 | 1 | 0 |
_aArchitectures for computer vision : _bfrom algorithm to chip with Verilog / _cHong Jeong. |
264 | 1 |
_aSingapore : _bWiley, _c2014. |
|
264 | 4 | _c©2014 | |
300 |
_a1 online resource (469 pages) : _billustrations |
||
336 |
_atext _2rdacontent |
||
337 |
_acomputer _2rdamedia |
||
338 |
_aonline resource _2rdacarrier |
||
504 | _aIncludes bibliographical references at the end of each chapters and index. | ||
588 | _aDescription based on print version record. | ||
590 | _aElectronic reproduction. Palo Alto, Calif. : ebrary, 2015. Available via World Wide Web. Access may be limited to ebrary affiliated libraries. | ||
650 | 0 | _aVerilog (Computer hardware description language) | |
650 | 0 | _aComputer vision. | |
655 | 0 | _aElectronic books. | |
776 | 0 | 8 |
_iPrint version: _aJeong, Hong. _tArchitectures for computer vision : from algorithm to chip with Verilog. _dSingapore : Wiley, c2014 _hxv, 450 pages _z9781118659182 _w2014016398 |
797 | 2 | _aebrary. | |
856 | 4 | 0 |
_uhttp://site.ebrary.com/lib/daystar/Doc?id=10908323 _zAn electronic book accessible through the World Wide Web; click to view |
908 | _a170314 | ||
942 | 0 | 0 | _cEB |
999 |
_c175692 _d175692 |