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006 m u
007 cr cn|||||||||
008 000815s2006 enk s 000 0 eng d
020 _z184663010X
035 _a(CaPaEBR)ebr10132649
035 _a(OCoLC)133162498
040 _aCaPaEBR
_cCaPaEBR
050 1 4 _aTK7870.15
_b.A48 2006eb
245 0 0 _aAdvanced manufacturing process, lead free interconnect materials and reliability modeling for electronics packaging
_h[electronic resource] /
_cguest editors Christopher Bailey and Johan Liu.
260 _aBradford, England :
_bEmerald Group Publishing,
_cc2006.
300 _a72 p.
490 0 _aSoldering & surface mount technology ;
_vv.18, no. 2
533 _aElectronic reproduction.
_bPalo Alto, Calif. :
_cebrary,
_d2009.
_nAvailable via World Wide Web.
_nAccess may be limited to ebrary affiliated libraries.
650 0 _aManufacturing processes.
650 0 _aElectronic packaging.
655 7 _aElectronic books.
_2local
700 1 _aBailey, Christopher.
700 1 _aLiu, Johan.
710 2 _aebrary, Inc.
856 4 0 _uhttp://site.ebrary.com/lib/daystar/Doc?id=10132649
_zAn electronic book accessible through the World Wide Web; click to view
908 _a170314
942 0 0 _cEB
999 _c74051
_d74051