000			01591nam a22003734a 4500
001			0000090097
005			20171002054607.0
006			m u
007			cr cn|||||||||
008			060227s2006 ne a sb 001 0 eng
010			_z 2006006869
020			_z0123705975 (hardcover : alk. paper)
020			_z9780123705976
035			_a(CaPaEBR)ebr10169928
035			_a(OCoLC)162573568
040			_aCaPaEBR _cCaPaEBR
050	1	4	_aTK7874.75 _b.V587 2006eb
082	0	4	_a621.39/5 _222
245	0	0	_aVLSI test principles and architectures _h[electronic resource] : _bdesign for testability / _cedited by Laung-Terng Wang, Cheng-Wen Wu, Xiaoqing Wen.
260			_aAmsterdam ; _aBoston : _bElsevier Morgan Kaufmann Publishers, _cc2006.
300			_axxx, 777 p. : _bill. ; _c25 cm.
490	1		_aThe Morgan Kaufmann series in systems on silicon
504			_aIncludes bibliographical references and index.
533			_aElectronic reproduction. _bPalo Alto, Calif. : _cebrary, _d2009. _nAvailable via World Wide Web. _nAccess may be limited to ebrary affiliated libraries.
650		0	_aIntegrated circuits _xVery large scale integration _xTesting.
650		0	_aIntegrated circuits _xVery large scale integration _xDesign.
655		7	_aElectronic books. _2local
700	1		_aWang, Laung-Terng.
700	1		_aWu, Cheng-Wen, _cEE Ph. D.
700	1		_aWen, Xiaoqing.
830		0	_aMorgan Kaufmann series in systems on silicon.
856	4	0	_uhttp://site.ebrary.com/lib/daystar/Doc?id=10169928 _zAn electronic book accessible through the World Wide Web; click to view
908			_a170314
942	0	0	_cEB
999			_c79253 _d79253