System-on-chip test architectures [electronic resource] : nanometer design for testability / edited by Laung-Terng Wang, Charles E. Stroud, Nur A. Touba.

Contributor(s): Material type: TextTextSeries: Morgan Kaufmann series in systems on siliconPublication details: Amsterdam ; Boston : Morgan Kaufmann Publishers, c2008.Description: xxxvi, 856 p. : illSubject(s): Genre/Form: DDC classification:
  • 621.39/5 22
LOC classification:
  • TK7895.E42 S978 2008eb
Online resources:
Tags from this library: No tags from this library for this title. Log in to add tags.
Star ratings
    Average rating: 0.0 (0 votes)
No physical items for this record

Includes bibliographical references and index.

Electronic reproduction. Palo Alto, Calif. : ebrary, 2013. Available via World Wide Web. Access may be limited to ebrary affiliated libraries.

There are no comments on this title.

to post a comment.