Wafer-level testing and test during burn-in for integrated circuits [electronic resource] / Sudarshan Bahukudumbi, Krishnendu Chakrabarty.

By: Contributor(s): Material type: TextTextSeries: Artech House integrated microsystems seriesPublication details: Boston : Artech House, 2010.Description: xv, 198 p. : illSubject(s): Genre/Form: DDC classification:
  • 621.38132 22
LOC classification:
  • TK7874 .B35 2010eb
Online resources:
Tags from this library: No tags from this library for this title. Log in to add tags.
Star ratings
    Average rating: 0.0 (0 votes)
No physical items for this record

Includes bibliographical references and index.

Electronic reproduction. Palo Alto, Calif. : ebrary, 2011. Available via World Wide Web. Access may be limited to ebrary affiliated libraries.

There are no comments on this title.

to post a comment.